Abstract

In this article, we propose an efficient and robust spike-driven convolutional neural network (SCNN) based on the NOR flash computing array (NFCA), which is mapped by the pretrained convolutional neural network with the same structure. The spike-driven system eliminates the additional analog-to-digital/digital-to-analog (AD/DA) conversion in the NFCA-based CNN. To study the performance of the hardware implementation, an NFCA-based SCNN for the recognition of the Mixed National Institute of Standards and Technology (MNIST) data set is simulated. Simulation results illustrate that the system achieves 97.94% accuracy with the computing speed of $1 \times 10^{6}$ frame per second (fps). Compared with the typical mixed-signal NFCA-based CNN, the NFCA-based SCNN saves 97% area and 56% energy consumption. Moreover, the NFCA-based SCNN demonstrates great robustness to 30% image noise with less than 2% accuracy loss. The impact of random telegraph noise (RTN) is also greatly reduced in which less than 1% accuracy decrease can be achieved at the 32-nm technology node.

Highlights

  • D EEP convolutional neural network (CNN) has showcased the unprecedented computing power [1] and achieved beyond human-level accuracy in terms of speech recognition, image recognition, and machine translation [2]–[4]

  • The training of the spike neural network (SNN) is mainly achieved using the biology-like unsupervised learning rules such as spiking time/rate dependent plasticity (STDP/SRDP) [22]–[24], which makes it difficult to support complex practical cognitive applications. Different from these biological network, NOR flash computing array (NFCA)based spike-driven CNN (SCNN) we proposed in this article is essentially a CNN trained with back-propagation (BP) algorithm [25]

  • If we assume that G+ and G− denote the conductance of the two flash cells, the value w stored by the pair can be described as w = k ∗ (G+–G−), where k denotes the coefficient of weight mapping from the algorithm to the NOR flash memory

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Summary

INTRODUCTION

D EEP convolutional neural network (CNN) has showcased the unprecedented computing power [1] and achieved beyond human-level accuracy in terms of speech recognition, image recognition, and machine translation [2]–[4]. To convert the analog operation result of the previous layer to the binary input of the subsequent layer, analog-to-digital/digital-to-analog (AD/DA) converters are essential [17] In this case, the complicated peripheral CMOS circuit with AD/DA converters dominates the hardware cost and the energy consumption (>85%) [18], which becomes one of the major concerns about improving the efficiency gains of the NOR flash memory-based CNN. The training of the SNN is mainly achieved using the biology-like unsupervised learning rules such as spiking time/rate dependent plasticity (STDP/SRDP) [22]–[24], which makes it difficult to support complex practical cognitive applications Different from these biological network, NOR flash computing array (NFCA)based spike-driven CNN (SCNN) we proposed in this article is essentially a CNN trained with back-propagation (BP) algorithm [25].

PRINCIPLE OF NOR FLASH-BASED SCNN
HARDWARE IMPLEMENTATION
Neuron
Weight Quantization
Neuron Discharge and Solutions
Area and Energy
Noise Tolerance
Summary
Findings
CONCLUSION

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