Efficient analysis of Multistage Interconnection Networks using finite output-buffered switching elements

Abstract

The performance of Multistage Interconnection Networks (MINs) constructed from output buffered switching elements (SE) is higher than those having input buffered SEs. Many of the existing analytical models for output buffered MINs assume uniform traffic and infinite buffers at each output port of an SE. The models are not realistic because, in practice buffers are finite and the traffic may not be uniform. Moreover, because of simplifying assumptions, the models do not produce accurate results. For the purpose of network design and proper buffer dimensioning, it is important to develop an accurate analytical model under realistic traffic patterns and finite buffered SEs. The objective of this paper is to develop an accurate model for MINs using finite output buffered SEs and operating in the presence of nonuniform traffic patterns. It is shown that the proposed analytical model is much more accurate than existing models.