Abstract
The main objective of this paper is to develop an efficient algorithm and architecture for scan conversion in high definition television. Scan conversion requires rapid operations of a large amount of image signal data, thus complex algorithm, architecture, and a large memory are necessary. A simple and effective interpolation method and a pipelined parallel architecture using memory partitioning for the real time operation are proposed. In the new interpolation algorithm, the new image data with edge direction information can be obtained using a simple calculation which considers six neighbouring pixels. To reduce the operation time and memory size, a pipelined parallel architecture is used, and the memory is partitioned into several memory banks. Thus, only small operations with a small memory and short operation time, are needed for the new algorithm and architecture.
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