Efficient 6.5 dBm 55 GHz CMOS VCO with simultaneous phase noise and tuning range optimization

Abstract

Abstract This paper presents the design and characterization of an efficient high-output-power 55 GHz fundamental oscillator. The performance parameters of the oscillator are analysed as a function of the contributors of the tank capacitance, and the design choices in the varactor for phase noise and for tuning range are exemplified. The circuit was implemented in 22 nm FD-SOI CMOS technology and occupies 0.046 mm2 area including the matching network. On-wafer measurement results have demonstrated 6.5 dBm peak output power, 22% peak DC-to-RF efficiency and −98.3 dBc/Hz phase noise at 1 MHz offset frequency, while the core draws 8.3 mW power. To the best knowledge of the authors, the efficiency is the best, while the output power is the second best among CMOS oscillators in the same frequency range, and the phase noise is the best result for V-band fundamental CMOS oscillators reported to date.