Abstract

Stress-induced voiding (SIV) is a serious problem in Cu dual-damascene interconnects (DDIs). The stress gradient under vias is the driving force of vacancy diffusion and void generation, therefore stress control in Cu-DDI is an important factor for suppressing SIV. In this study, the stress effect of upper Cu film on SIV in lower Cu lines is investigated, and the stress distribution in Cu-DDI is analyzed by finite element analysis. It is found that SIV in the lower Cu lines is strongly affected not only by the width of lower lines but also by the metallurgical properties of the Cu film in upper metals. Suppression of tensile stress in the via of the upper Cu film decreases the stress gradient in the lower line around the via, and eventually, the driving force of vacancy diffusion to the via bottom. Control of the metallurgical properties to suppress Cu creep during annealing is a key factor for decreasing SIV in lower Cu lines. High-temperature deposition of Cu film with a small coefficient of thermal expansion (CTE) is a solution to suppressing SIV failure in Cu-DDIs.

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