Effects of surface states on control characteristics of nano-meter scale Schottky gates formed on GaAs

Abstract

Effects of surface states on gate control characteristics of nano-meter scale Schottky gates formed on GaAs are investigated both theoretically and experimentally. Special sample structures are used. They are metal–insulator–semi-conductor structures having nano-meter scale Schottky dot arrays for capacitance–voltage ( C–V) measurements and metal–semi-conductor field effect transistor structures having nano-meter scale grating Schottky gates for current–voltage ( I–V) measurements. Measured C–V and I–V results are compared with results of theoretical calculation on a computer. The effects of surface states are found to be two-fold. Namely, it is shown that control characteristics of nano-meter scale Schottky gates are strongly degraded by the presence of Fermi level pinning caused by surface states on the free surface surrounding the gate. It is also shown that a significant amount of gate-induced lateral charging of surface states takes place around the gate periphery, effectively increasing the gate dimension. These results indicate the critical importance of control of surface states in nano-devices using nano-meter scale Schottky gates.