Effects of sidewall spacer layers on thermal and low frequency noise performance of SOI UTB MOSFETs

Abstract

In this paper we investigate the impact of sidewall spacer dielectric constant and length on the noise behavior of SOI UTB MOSFETs using numerical simulation techniques. The important electrical parameters of devices such as drain current, transconductance are computed and utilized to obtain normalized power spectral density of drain current, noise resistance and minimum noise figure of SOI UTB MOSFETs. Our investigations manifest that thermal noise as well as low frequency noise parameters can be reduced considerably by employing spacer layers with high dielectric constant and low value of spacer length (~ 5 nm). The minimum noise figure NFmin for thermal noise is obtained as low as 1.2 dB at frequency of 1 GHz by setting 1.2 V at the gate and drain terminals.