Effects of Selecting Channel Direction in Improving Performance of Sub-100 nm MOSFETs Fabricated on (110) Surface Si Substrate

Abstract

We investigated the low field mobility and short channel characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs) on (110) surface Si substrates with various channel directions from the viewpoints of experiment and numerical simulation. We found that the mobility (µ) ratio of (110) substrates to (001) substrates (µ(110)/µ(001)) does not depend on the vertical electric field due to the identical surface roughness for (110) and (001) substrates. We verified mobility enhancement and its channel direction dependence by conducting a detailed carrier transport simulation using a full band model and relaxation time approximation. We obtained good threshold voltage (Vth) lowering characteristics due to the suppression of channeling at the source and drain (SD) extension by implant sequence control. Our results showed that the improvement in propagation delay time (CV/I) and on-current ratio of nMOS to pMOS (Ionn/Ionp) obtained by using an optimized combination of channel directions and a (110) surface Si substrate is attractive for future LSIs down to the sub-100 nm region.