Effects of pressure and capping layer thickness on sub-micron T-gate recess etching of GaAs p-HEMTs by SiCl 4/SiF 4/O 2 reactive ion etch

Abstract

Reactive ion etching for T-gate recessing has a vital importance in the fabrication of high performance sub-micron gate length GaAs pseudomorphic high electron mobility transistors (pHEMTs), because the geometry after etching significantly affects the device performance. In this work, the impact of etching parameters on the recess geometry has been investigated for various cap layer thicknesses in the range 20–50 nm by using SiCl 4/SiF 4/O 2 chemistry in a RIE system. It was found that the etching pressure plays a significant role in defining the recess geometry. A pressure of 100 mTorr and etch time of less than 1 min, with a gas flow of SiCl 4/SiF 4/O 2=1.2:8.2:0.15 (sccm) and a RF power of 18 W are required to ensure controllable and repeatable recess geometries (both vertical and lateral) for layer structures with GaAs cap thickness of less than 30 nm. In contrast, a pressure of 250 mTorr and etch time of 2 to 2.4 min are required to uniformly etch devices with cap thickness of greater than 30 nm without serious resist erosion. pHEMTs with 0.12 μm gate length made using this dry etching process showed very good electrical performance.