Abstract

Controlling the delay and the transition time of the clock signal in the presence of various noise sources, process parameter variations and environmental effects represents a fundamental problem in the design of high speed synchronous circuits. The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular, the effects of variations in power supply (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> ), temperature, and gate oxide thickness (t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OX</sub> ) on the clock signal delay and transition time are evaluated. In addition to parameter variations, crosstalk effects among the H-tree structure and other interconnect wires are investigated. It is shown that the delay and transition time of the clock signal is spatially dependent on interconnect crosstalk along an H-tree

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