Effects of High Temperatures on Cell Reading, Programming, and Erasing of Schottky Barrier Charge-Trapping Memories

Abstract

This paper examines the temperature effect of Schottky barrier source/drain charge-trapping memories. The current–voltage curves and programming/erasing characteristics are experimentally investigated at room temperature and higher 85 °C and 125 °C. 2-D device simulations were performed to elucidate the physical mechanisms of Schottky barrier cell devices at high temperatures. For Schottky barrier charge-trapping cells, two different mechanisms of ambipolar conduction are classified: 1) thermionic emission and 2) Schottky barrier tunneling. The thermionic emission is susceptible to variations of high temperatures, leading to considerable shifts in logarithmic scale off-state drain-currents at low gate voltages. However, at adequately large gate voltages, the Schottky barrier tunneling plays a key role in contributing drain currents. The Schottky barriers and associated tunneling are relatively insensitive to the variations of device temperatures, preserving favorable temperature-insensitive programming and erasing Schottky barrier charge-trapping cells for use in the high-temperature automotive industry.