Abstract
The effect of HC1 annealing of memory oxides of MNOS capacitors on the memory window size and location has been investigated. Both native and thermal oxides were studied. HC1 annealed oxide capacitors exhibit larger memory windows than unannealed capacitors. The largest increase is observed for ±20 volt write/erase pulses. The percent HC1 in the annealing ambient is shown to be a very sensitive parameter in the annealing process. HC1 annealing also causes the center of the memory window to shift toward less negative values of threshold voltage thus reducing the size of the memory window for source-drain protected MNOS devices.
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