Abstract
This paper focuses on the extraction of an accurate small-signal equivalent circuit for metal-oxide-semiconductor field-effect transistors (MOSFETs). An analytical modeling approach was developed and successfully validated through the comparison between measured and simulated scattering parameters. The extraction of the equivalent circuit elements allowed for the estimation of the intrinsic unity current-gain cutoff frequency, which is a crucial figure of merit for assessing the high-frequency performance. The experimental data show that the cutoff frequency of the tested devices exhibits a nearly ideal scaling behavior with decreasing gate length.
Highlights
The extraction of an accurate small-signal equivalent circuit is of great importance for evaluating microwave field-effect transistor (FET) performance
The open structure can be represented with a pi network composed of the tested metal-oxide-semiconductor field-effect transistors (MOSFETs)
The simulations are by MOSFETs omitting Rsub in the model.gate lengths: 0.25 μm, 0.5 μm, and 1 μm
Summary
The extraction of an accurate small-signal equivalent circuit is of great importance for evaluating microwave field-effect transistor (FET) performance. The numerical optimization approach can yield non-physical values of the circuit elements, by which the results can critically depend on the initial element values, local minima, and the optimization technique itself These drawbacks can be overcome by adopting the analytical approach that is based on first extracting the extrinsic bias-independent elements, de-embedding their contributions with simple matrix manipulations, and calculating the intrinsic bias-dependent elements from the intrinsic admittance (Y-) parameters. The extrinsic capacitances Cpg and Cpd are straightforwardly extracted from the imaginary parts of parameters of an open structure that has been fabricated on the same die of the same wafer of the the Y-parameters of an open structure that has been fabricated on the same die of the same wafer of tested MOSFETs. In general, the open structure can be represented with a pi network composed of the tested MOSFETs. In general, the open structure can be represented with a pi network composed three capacitances modeling the capacitive coupling between the pads. The intrinsic section of the MOSFET can be modeled through a distributed channel resistance and a distributed gate capacitance, leading can be modeled through a distributed channel resistance and a distributed gate capacitance, leading to to the following expressions of the Z‐parameters [13]: the following expressions of the Z-parameters [13]: R
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