Abstract

The rapid annealing behavior of silicon NPN transistors irradiated with fission neutrons at the Sandia Pulsed Reactor (SPR-II) was investigated in this work. The annealing which normally occurs in the unobservable period during and shortly after the~50 ?s wide neutron burst has been shown to be considerably reduced by removing bias to the device during the burst (current circumvention). Room temperature annealing factors greater than three were observed for nearly all devices when bias was reapplied after the burst, even for high collector currents and after considerable circumvention times. These annealing factors were considerably larger than ones measured using comparable dc injection levels, indicating that a substantially greater portion of the recovery was observed using current circumvention. By following a greater portion of the recovery, very little difference was observed between annealing rates at 132°K and 300°K when annealing curves were normalized to unity total change. An activation energy of less than .02eV was obtained by comparing the times for 50 percent annealing to occur at different temperatures. This value is significantly less than ~.3eV activation energy obtained in previous studies. The circumvention technique also allowed a quantitative method for measuring the injection dependence of rapid annealing. The results for the 2N1613 indicated widely different annealing factors were joined into a single annealing curve when plotted as a function of injection charge (time-integrated current). A charge injection between one and ten microcoulomb was sufficient to reduce AF to two for nearly all the devices and device types examined.

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