Effects of annealing on Ti, Pd, and Ni/n-Al/sub 0.11/Ga/sub 0.89/N Schottky diodes

Abstract

Schottky diodes of Ti, Pd, and Ni/n-Al/sub 0.11/Ga/sub 0.89/N have been fabricated and the barrier heights were measured to be 0.60, 0.95 and 0.97 eV using current-voltage (I-V) measurements and to be 0.67, 1.15 and 1.22 eV using capacitance-voltage (C-V) measurements. Annealed Schottky diodes are show higher I-V and C-V barrier heights when compared with as-deposited Ti Schottky diodes except high temperature annealed (450/spl deg/C/30 min-500/spl deg/C/1 hr) Ti Schottky diodes. The I-V barrier height of Ti/n-Al/sub 0.11/Ga/sub 0.89/N increases up to the annealing temperature 350/spl deg/C/5 min and it decreased for higher annealing temperatures. The C-V barrier height increases up to the annealing temperature 150/spl deg/C/5 min for Ti (1.63 eV), 250/spl deg/C/5 min for both Pd (1.68 eV) and Ni (1.53 eV) Schottky diodes respectively. The increase of barrier heights for low temperature annealing is due to intimate contact between metal and semiconductor. Rectifying behavior has been observed up to the annealing temperature 450/spl deg/C/1 hr for Ni/n-Al/sub 0.11/Ga/sub 0.89/N and 500/spl deg/C/1 hr for both Ti and Pd/n-Al/sub 0.11/Ga/sub 0.89/N Schottky diodes. An increase of surface average roughness has been observed for the annealed Pd and Ni Schottky diodes except Ti Schottky diodes. Al/sup 0.11/Ga/sub 0.89/N surface behaves more like ceramic with both Pd and Ni than semiconductor.