Effects of anisotropic stress on silicon planar junctions

Abstract

The effects of anisotropic stress on the current-voltage and noise characteristics of emitter-base junctions of silicon planar transistors have been investigated. Stress was applied to the emitter surface by means of a steel probe having a point radius of 50 μm. The noise measurements were made at frequencies of 1, 10 and 100 kc/s. The experimental results show that the application of stress to the device results in an increase in the base current and in the measured equivalent-noise current. The effects are reversible up to a maximum compression of 9·2 × 1010 dyn cm-2. At a frequency of 100 kc/s it was found that the ratio of the measured equivalent-noise current to the d.c. bias current is approximately unity over the measured region of the diode forward-bias characteristic. The ratio is greater than unity at lower frequencies. The experimental data are interpreted in terms of the model developed by Wortman and his co-workers based upon stress-induced variations in the band-gap energy of the semiconductor and their effect on minority-carrier densities. It is shown that the experimental results are consistent with a stress-induced change in carrier concentration and a recombination-generation rate independent of stress.