Effective Trapping Reduction in SiO2/GaN MOS Structure by High Pressure Water Vapor Annealing

Abstract

Constant current biased voltage versus injection electron fluence (V-F) and High-Low frequency C-V measurements were conducted for GaN-SiO2 system treated by high pressure water vapor annealing (HPWVA). Combined with a kinetic rate analysis based on electron trapping and trap generation, a smaller amount of interface traps as well as a less severe trapping behavior is confirmed. As a result, HPWVA can be a promising method for improving both bulk and interface qualities of GaN/SiO2 MOS structure, which plays an important role in power electronics.