Effective suppression of deep interface states and dielectric trapping in SiNx/GaN metal-insulator-semiconductor structures by a SiOxNy interfacial layer grown by plasma-enhanced atomic layer deposition

Abstract

A 3 nm-thick SiOxNy grown by plasma-enhanced atomic layer deposition (PEALD) at 500 °C is utilized as the interfacial layer to suppress the deep interface states and dielectric trapping in SiNx/GaN metal-insulator-semiconductor (MIS) structures. It is capable of protecting the GaN surface from decomposing during the growth of SiNx dielectric by low-pressure chemical vapor deposition (LPCVD) at a relatively high temperature of 780 °C. The SiNx/GaN interface with the PEALD-SiOxNy interfacial layer features a sharp interface, a remarkably reduced threshold voltage hysteresis (ΔVTH) as well as suppressed interface state density. The conduction band offset (ΔEC) between the LPCVD-SiNx dielectric and GaN increases from 2.67 to 3.77 eV by the PEALD-SiOxNy interfacial layer. It is verified by isothermal capture transient as well as constant-capacitance deep-level transient spectroscopy (CC-DLTS) measurements that the electron-trapping by the bulk states of EC-ET ∼ 1.1 eV in the LPCVD-SiNx dielectric and the deep interface states, can be effectively blocked by the PEALD-SiOxNy interfacial layer at high gate bias. The LPCVD-SiNx/ PEALD-SiOxNy bilayer could be a compelling gate dielectric for III-nitride MIS high-electron-mobility transistors (HEMTs).