Effective heuristic algorithms for VLSI circuit partition

Abstract

The paper studies the multiway graphpartition problem for VLSI circuit partition. Given a graph representing a VLSI circuit, the graph vertices are partitioned into mutually exclusive subsets to minimise the total weights for edges crossing the subsets under the constraint that the vertex weights are evenly distributed among the subsets. Simulated annealing and tabu search are adapted to solve this problem based on a special neighbourhood design. A new general optimisation paradigm, called stochastic probe, is then proposed to integrate the advantages of the above two approaches. Extensive experimental study shows that all three new algorithms produce significantly better solutions than the LPK algorithm reported by Lee, Park and Kim, and that the stochastic probe algorithm always produces the best solution among all the four algorithms with a running time comparable with that for the LPK algorithm.