Effective design-for-testability techniques for H.264 all-binary integer motion estimation

Abstract

H.264 is the latest video compression standard with the highest coding efficiency, and the All-Binary Integer Motion Estimation algorithm (H.264-ABIME) is usually adopted for reducing the hardware area. There are many repeated modules in the H.264-ABIME block, thus the well-known Iterative-Logic-Array (ILA) architecture can be applied to test all the modules with constant number of test patterns. The most important condition for the ILA architecture is that the I/O function of each module should be bijective (reversible). However, most of the original designs do not have this property. In this paper, effective design-for-testability schemes are proposed by using the ILA architecture for the entire H.264-ABIME block. The repeated modules are modified to be bijective and cascaded as the ILA architecture. Then each module can be fully tested by only testing the first module exhaustively. A simple built-in self-test circuit is also proposed. Moreover, the physical designs of the scan-chain and the proposed test schemes are synthesised with the UMC 0.18 µm technology. The total test time of the proposed method is only about 13.53% of that of scan-chain method with automatic test pattern generation (ATPG), and the hardware and delay-time overheads are still very low.