Effective Design and Implementation of AMBA AHB Bus Protocol using Verilog

Abstract

The computer's performance is intensely reliant on bus interconnect design. An ineffectively designed system bus can interfere with the transmission of guidelines and the information between the memory and processor or between the peripheral gadgets and memory. The Advanced Microcontroller Bus Architecture (AMBA) specification defines high-performance microcontroller on-chip communication standards. AHB is part of the AMBA convention family. The AMBA AHB is designed for high-performance, high-clock system modules. The AHB acts as the system's high-performance backbone bus. AHB supports the efficient connection of low-power macro cell peripheral functions to processors, on-chip memories and external off-chip memory interfaces. All signal transitions relate only to the rising clock edge, so that AHB peripherals can easily be integrated into any design flow. This paper describes AMBA AHB design and implementation using Verilog. The read/write operation was implemented using Xilinx simulator®.