Abstract

In this paper, virtual prototyping is used to generate more accurate and efficient stress design rules for IC backend structures, in combination with packaging processes and geometry. The addressed failure mode is passivation cracks and depending on the package type or family this failure mode is easier to occur. A series of experiments are conducted to prove the effect of the package type on this IC failure mode. It is demonstrated that for successful development of IC backend structures and processes, it is essential to take into account the influence of the package in the earlier phase of IC backend development. The so-called integral design rules, accounting for all the major loading sources and history of the complete product creation process has to be used for the development of new generation semiconductors devices.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.