Abstract

This work provides a comprehensive investigation of nitrogen and aluminum doping and its consequences for the physical properties of 3C-SiC. Free-standing 3C-SiC heteroepitaxial layers, intentionally doped with nitrogen or aluminum, were grown on Si (100) substrate with different 4° off-axis in a horizontal hot-wall chemical vapor deposition (CVD) reactor. The Si substrate was melted inside the CVD chamber, followed by the growth process. Micro-Raman, photoluminescence (PL) and stacking fault evaluation through molten KOH etching were performed on different doped samples. Then, the role of the doping and of the cut angle on the quality, density and length distribution of the stacking faults was studied, in order to estimate the influence of N and Al incorporation on the morphological and optical properties of the material. In particular, for both types of doping, it was observed that as the dopant concentration increased, the average length of the stacking faults (SFs) increased and their density decreased.

Highlights

  • Silicon carbide is a wide-bandgap semiconductor that shows high mechanical strength, chemical inertness and thermal conductivity

  • Compared to 4H and 6H hexagonal SiC, 3C-SiC films have the advantage that they can be heteroepitaxially grown through low-temperature chemical vapor deposition (CVD) as 3C-SiC is the most thermodynamically stable polytype

  • Current technology involves the use of hetero-epitaxial growth on silicon, which inherently entails a 20% lattice parameter mismatch between Si and SiC and contributes to the generation of compressive intrinsic stress, whereas 8% at different degrees of thermal expansion provides a tensile contribution during the cooling period from the growth temperature to room temperature (RT)

Read more

Summary

Introduction

Silicon carbide is a wide-bandgap semiconductor that shows high mechanical strength, chemical inertness and thermal conductivity. Current technology involves the use of hetero-epitaxial growth on silicon, which inherently entails a 20% lattice parameter mismatch between Si and SiC and contributes to the generation of compressive intrinsic stress, whereas 8% at different degrees of thermal expansion provides a tensile contribution during the cooling period from the growth temperature to room temperature (RT). Such mismatches give rise to misfit dislocations and stacking faults (SFs) growing along the (111) planes of the face-centered cubic (FCC) lattice. Such defectiveness hinders the realization of devices and constitutes considerable leakage sources not compatible with the development of very large-scale integration (VLSI) technology [5]

Methods
Results
Conclusion
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call