Effect of n +-polycrystalline silicon gate rapid thermal annealing on the electrical properties of the gate oxide

Abstract

The application of the rapid thermal annealing (RTA) technique as a high temperature step needed to activate the dopant in polycrystalline silicon gates and the effect of this anneal on the electrical properties of the underlying gate oxide were studied for RTA times ranging from 1 to 100 s and temperatures from 950 to 1050°C in an N 2 ambient. A time of 10 s was found to result in the best I- V and C- V characteristics of the metal-oxide-semiconductor structures for the entire temperature range studied. An increase in the RTA temperature causes increased electron trapping during avalanche injection. Longer annealing times at a constant temperature also resulted in an increase in the density of deep electron traps. Standard furnace annealing was significantly better than RTA only from the point of view of the resistance of the annealed structures to the generation of interface states on high field electron injection.