Abstract

This paper reports that process-induced mechanical stress affects the performance of short-channel MOSFETs, and focuses on the effect of a plasma-enhanced CVD nitride contact-etch-stop layer. The stress in the channel region induced by the nitride layer changes transconductance ( G m), thereby changing the device performance. When the nitride stress varies from +300 MPa (tensile) to −1.4 GPa (compressive), NMOSFET performance degrades by up to 8% and PMOSFET performance improves up to 7%. These changes are caused by the modulation of the electron/hole mobilities, so controlling process-induced stress and considering this mobility change in a precise transistor model are necessary for deep-submicron transistor design.

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