Effect of Gate-Recess Structure on Electron Transport in InP-Based High Electron Mobility Transistors Studied by Monte Carlo Simulations

Abstract

We performed two-dimensional Monte Carlo (MC) simulations of 50-nm-gate InP-based lattice-matched In0.52Al0.48As/In0.53Ga0.47As high electron mobility transistors (HEMTs) and clarified the effect of gate-recess structure on electron transport. To understand the electron transport in the recessed-gate HEMTs, we used two parameters in the MC simulations: the lateral recess length lre and recess depth dre. When dre is constant, the electron velocity in the channel layer under the gate electrode increases with decreasing lre. On the other hand, when lre is constant, the electron velocity in the channel under the gate increases with increasing dre. The electron velocity increases when the steepness of the lateral potential profiles in the InGaAs channel around the drain-side end of the gate electrode increases.