Effect of gate length on the parameter degradation relations of PMOSFET under NBTI stress

Abstract

The influence of PMOSFET gate length on the parameter degradation relations under negative bias temperature instability (NBTI) stress is studied. The threshold voltage degradation increases with reducing the gate length. By calculating the relations between the threshold voltage and the linear/saturation drain current, we obtain their correlation coefficients. Comparing the test result with the calculated linear/saturation current value, we obtain the ratio factors. The ratio factors decrease differently when the gate length diminishes. When the gate length reduces to some degree, the linear ratio factor decreases from greater than 1 to nearly 1, but the saturation factor decreases from greater than 1 to smaller than 1. This results from the influence of mobility and the velocity saturation effect. Moreover, due to the un-uniform distribution of potential damages along the channel, the descending slopes of the curve are different.