Abstract

This letter presents a detailed experimental investigation of the erase transients of decananometer NAND Flash memories, showing a drop and then a recovery of the erase efficiency as the erase bias is increased. The modulation of the erase efficiency is studied as a function of the erase time, temperature, and the number of applied pulses: Longer erase times or higher temperatures are shown to reduce the efficiency drop, while this is enhanced when the erase pulse is split into a sequence of short pulses. Experimental evidences are explained as a result of the deep-depletion condition that exists in the floating-gate polysilicon for moderate erase biases and short erase times, reducing the electric field in the tunnel oxide and the electron-tunneling current discharging the floating gate.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.