Abstract

The fan-out wafer level package (FOWLP) is the most common advanced package technology due to its higher I/O density, ultra-thin profile, high electrical performance, and low power consumption. However, warpage induced by the coefficient of thermal expansion (CTE) mismatch between different kinds of materials is a mechanical issue in FOWLPs. We investigated the warpage of fan-out package (FO package) components molded by EMC (with 3 kinds of materials) for two mold thicknesses. The fan-out package component was fabricated with Si chips (three thicknesses). The warpage of the fan-out package component from room temperature to 260 °C decreased with increasing chip thickness and mold thickness. Finite element method (FEM) analysis showed that the warpage of the fan-out package at 25 °C decreased when the CTE mismatch between the EMC and Si chip decreased. The warpage of the fan-out package at 260 °C decreased with decreasing modulus of the EMC due to a lower stress relaxation. The electrical resistance of the FOWLP component increased more than 2.5 times after temperature–humidity and thermal shock testing. The warpage decreased with increasing EMC thickness, decreasing chip thickness, a lower CTE of the EMC, and a lower modulus of the EMC.

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