Abstract
Current knowledge of memristor behavior is limited to a few physical models of which little comprehensive data collection has taken place. The purpose of this research is to collect data in search of exploitable memristor behavior by designing and implementing tests on a HP Labs Rev2 Memristor Test Board. The results are then graphed in their optimal format for conceptualizing behavioral patterns. This series of experiments has concluded the existence of an additional memristor state affecting the behavior of memristors when pulsed with positively polarized DC voltages. This effect has been observed across multiple memristors and data sets. The following pages outline the process that led to the hypothetical existence and eventual proof of this additional state of memristor behavior.
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