Effect of Annealing Printed Electrodes on Gate Dielectric Hydrophobicity and Device Performance in Organic Transistors

Abstract

Abstract Body: Printed electronics is an inexpensive way of producing electronic devices for every-day applications such as flexible biosensors, affordable RFID price tags and large-area optoelectronics. Transistors are the most fundamental components of many digital and analog circuits. Printed organic thin-film transistors (OTFT) consist of different functional layers deposited from solution. The conductive electrodes are commonly printed using metal nanoparticles that need to be sintered to become conductive. These electrodes are usually printed on other previously solution-processed layers. However, annealing the electrodes will impose another annealing step on the previously deposited layers. Depending on the chemical structure of these layers, their surface or bulk might undergo changes that might affect the final device performance. In bottom-contact bottom-gate organic transistors, the source and drain electrodes are printed onto the gate dielectric layer, which will undergo the electrode post-annealing. In this work, the effect of changing the annealing temperature of silver electrodes in p-type organic transistors is studied. ITO-coated glass is used as the substrate, where the ITO layer works as the gate electrode. A dielectric layer of Teflon AF 1600 (3% in Fluorinert FC-40) then covers the ITO layer through two spin-coating steps. This dielectric layer is subsequently annealed at 150°C for 30 minutes resulting in 450 nm thickness. Since this dielectric layer has low surface energy, it is not possible to form a line of connected ink droplets through printing, therefore the dielectric layer is plasma treated to increase its surface energy. Afterward, for the source and drain electrodes, silver nanoparticle ink is inkjet-printed with a custom-made printer and a 60 μm diameter nozzle. The transistors have varying channel length (20 - 75 μm) and 1.3 mm width. These electrodes are then sintered at different temperatures for 30 minutes (after 5 minutes heating at 60°C to prevent coffee ring effect). This step also acts as a second post-annealing step for the dielectric layer. Finally, the organic semiconductor PDBPyBT is spin-coated in the last step, followed by annealing at 120°C for 10 minutes. The transistors are p-type and are biased at a drain voltage of -120 V in saturation. Silver annealing temperatures of 80°C, 100°C, 120°C, and 200°C are studied. Devices annealed at 120°C show the best performance with the maximum saturation field-effect mobility of 0.13 cm2/V.s and the maximum saturation Ion/off ratio of 3.41x107. The difference in performance between different electrode sintering temperatures cannot be explained by changes in electrode conductivity because it is much lower than the channel resistance in all studied cases for this ink. The bulk dielectric properties of the Teflon gate dielectric also remain unchanged during the electrode annealing step with a dielectric constant of 2.1. However, the Teflon surface properties are changed. Water contact angle increases monotonically from 85° with no post-annealing to 120° with 200°C post-annealing. With 200°C electrode annealing, this leads to partial dewetting and accumulation of the semiconductor between the more wettable source and drain electrodes. The resulting large thickness of the semiconductor mainly deteriorates device off-state performance reducing the average on-off-ratio from 1.14x107 to 7.25x105. For 80°C, 100°C, and 120°C electrode annealing, the semiconductor thickness remains constant at 100 nm, however, the Teflon surface becomes more hydrophobic. It has been observed before that organic semiconductors perform better on more hydrophobic surfaces, which usually requires a chemical surface modification step. Here, we show that this can be achieved by a simple post-annealing step, which is already part of device fabrication to sinter the source and drain electrodes and should therefore be considered when designing the process flow of the complete device.