Abstract
In this paper the study of the tunneling current–voltage (I–V) characteristics of silicon surfaces with n- and p-type conductivity as a function of roughness in the presence of an adsorbed insulating layer of polyethylenimine (PEI) is presented. A new approach is proposed for analysis of the tunnel current–voltage characteristics of a metal–insulator–semiconductor structure based on the combination of two models (Simmons and Schottky). Such joint analysis demonstrates the effect of surface states and evaluates changes in the band bending and electron affinity after the deposition of the polyelectrolyte layer on the semiconductor surface. As a result, we are able to differentiate between the equilibrium tunnel barrier (qφ 0) and the barrier height (qφ B). It is shown that the deposition of the polymer leads to an increase of the equilibrium tunnel barrier by more than 250 meV, irrespective of the roughness and the conductivity type of the silicon substrate. The PEI deposition also leads to changes in the barrier height (less than 25 meV) that are smaller than the equilibrium tunnel barrier changes, indicating pinning of the Fermi level by the electron surface states that are energetically close to it. These surface states can trap charge carriers, a process leading to the formation of a depletion region and band bending on the semiconductor surface. Moreover, the change in the barrier height qΔφ B depends on the conductivity type of the semiconductor, being positive for n-type and negative for p-type, in contrast to qΔφ 0, which is positive for all substrates. The change is explained by capture of electrons preferably from the semiconductor space-charge region in the presence of a cationic polyelectrolyte, e.g., PEI.
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