Abstract
Electrically Erasable Programmable Read Only Memory (EEPROM) is a widely used memory device, nowadays implemented in submicron technology nodes. In this paper we show how the well-known trapping power law found in the literature can be retrieved by combining well calibrated state of the art Technology Computer Aided-Design (TCAD) simulations with a compact model for tunnel oxide degradation during EEPROM cycling. We pinpoint how this approach can be used to predictively assess the programming window closure and consequently, considerably reduce the time-consuming cycling test procedure. Finally, we show how this methodology can cover a wide range of temperatures, making it very attractive for high demanding applications such as automotive.
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