Editorial

Abstract

The IEEE Transactions on Semiconductor Manufacturing congratulates Haoyu Yang, Shuhe Li, Wen Chen, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, and Bei Yu whose paper <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DeePattern: Layout Pattern Generation With Transforming Convolutional Auto-Encoder</i> (Vol. 35, No.1, February 2022) was selected as the Best Paper for 2022 by a team of Associate Editors. This paper proposes generative machine learning models to synthesize VLSI layouts through a pattern generation framework that reduces the challenging creation problem into two simpler subproblems with the aid of an efficient squish pattern representation. The problem is treated by designing an innovative transforming convolutional auto-encoder in TCAE architecture, aiming to generate efficient and representative pattern shapes. The paper introduces a GAN-guided TCAE ML analysis that targets massive DRC-clean and content-specific pattern generation following certain design rules, without losing pattern library diversity. Through experiments on 7nm EUV designs, the authors demonstrate that each latent vector node in TCAE has a real physical meanings in layout domain and transformations on latent vectors can produce additional topologies of interest. Results show that the generated pattern library exhibits larger pattern number and pattern diversity compared to the traditional state-of-the-art industry layout generator.