Early gate failures in biased GaAs field effect transistors from electromigration-induced damage superimposed on kirkendall voids

Abstract

Electrical gate failures in GaAs field effect transistors (FETs) were analysed. In the analysis, the TiPt phase growth during high temperature storage was estimated using growth rates which were calculated at 100, 325 and 400°C from a (time) 1 2 dependence. The calculations reveal volume changes by -6.36% and -6.325% as a result of the formation of the TiPt and Ti 3Pt phases respectively. The volume changes and lattice mismatch give rise to mechanical strains causing metallurgical failure of the Ti/Pt layers and consequently the formation of AuAl intermetallics. Compressional stresses in the films relax through the formation of hillocks. In biased FETs a new failure mechanism, electromigration-induced damage superimposed on Kirkendall voids as a result of current crowding, occurs when the current density is as low as 1 × 10 4 A cm −2 and gives rise to early gate failures.