Abstract

In recent years, the electrical and/or electronic architecture of vehicles has been significantly evolving. The new generation of cars demands a considerable amount of computational power due to a large number of safety-critical applications and driver-assisted functionalities. Consequently, a high-performance computing unit is required to provide the demanded power and process these applications while, in this case, vehicle architecture moves toward a centralized architecture. Simultaneously, appropriate software architecture has to be defined to fulfill the needs of the main computing unit and functional safety requirements. However, the process of configuring and integrating critical applications into a vehicle central computer while meeting safety requirements and optimization objectives is a time-consuming, complicated, and error-prone process. In this paper, we firstly present the evolution of the vehicle architecture, past, present, and future, and its current bottlenecks and future key technologies. Then, challenges of software configuration and mapping for automotive systems are discussed. Accordingly, mapping techniques and optimization objectives for mapping tasks to multi-core processors using design space exploration method are studied. Moreover, the current technologies and frameworks regarding the vehicle architecture synthesis, model analysis with regard to software integration and configuration, and solving the mapping problem for automotive embedded systems are expressed. Finally, we propose four research questions as future works for this field of study.

Highlights

  • The complexity and types of required applications in today’s cars have been growing substantially, as a result of advanced driver-assistance systems (ADAS) and automated driving features

  • SQuAT-Vis: This is a tool that can be plugged into software architecture optimization approaches and allows architects to investigate results [88] to have an optimal software architecture satisfying quality-attribute requirements

  • We first presented the evolution of car E/E architecture during the last few years and illustrated the current bottlenecks of E/E architecture as well as the major technologies for the future of vehicle architecture comprising software architecture of the high-performance computing unit (HPCU)

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Summary

Introduction

The complexity and types of required applications in today’s cars have been growing substantially, as a result of advanced driver-assistance systems (ADAS) and automated driving features. The car E/E architecture started with distributed/decentralized architectures, where a considerable number of electronic control units (ECUs) are interconnected, and each of them has specific vehicular functionality. Multi-core technology has rapidly been extending in different areas of embedded systems to deliver an appropriate performance for artificial intelligence (AI)-based applications and systems by giving scalable computing power [4]. Allocation of the tasks in the multi-core can be performed in design-time or run-time. There is no application running during design-time task allocation as opposed to run-time mapping, where the tasks can be assigned to different cores, while the system is running. Multi-core architecture can consist of two types, homogeneous and heterogeneous, based on the application circumstances and user requirements. In terms of task mapping complexity, a homogeneous processor requires less work than a heterogeneous one as it has identical cores.

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