Abstract
This paper focuses on addressing the synchronization control problem of memristive chaos through the investigation of a single feedback controller strategy. Our objective is to deploy this strategy on field-programmable gate arrays (FPGA) with the aim of bolstering the security and reliability of memristive chaotic synchronization control. Concurrently, we seek to enhance system performance and fulfill the diverse requirements of various applications. Initially, the study utilizes chaos synchronization theory and the Routh–Hurwitz stability criterion to devise a feedback controller with a single input. This controller plays a crucial role in establishing a synchronization system specifically designed for memristive chaos. Subsequently, the FPGA design approach utilizing DSP Builder is employed to create models for both the single-input feedback controller and the memristive chaotic synchronization control system. This approach facilitates the efficient translation of these theoretical concepts into practical digital circuit implementations. Finally, the paper concludes with an experimental analysis that verifies the feasibility and practical applicability of the FPGA circuit design for memristive chaotic synchronization control.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
