Abstract

Dynamic High Temperature Operating Life (DHTOL) test is becoming a mandatory test for GaN power devices as it explores the device reliability under application-close conditions. However, the number of applications and circuitries where GaN power devices are intended to be used poses a serious challenge in terms of validity of the application-like test setup used to evaluate the device degradation. In this paper, an accurate model supported by real DHTOL tests was developed precisely including test board and device properties with parasitic elements providing an advanced environment to support the evaluation of the GaN switching behavior and its stability. In order to evaluate and validate the current and voltage peaks, which define the switching stress conditions, we present the methodology to extract device, package, and board parasitics of the complete test setup. Furthermore, an accurate junction temperature (TJ) estimation and prediction technique is also presented being essential to judge and discriminate the natural self-heating effects from the one induced by the RDSON degradation during long-term repetitive hard-switching events.

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