Abstract

The problem of dynamic electrothermal equivalent extraction for system level and signal integrity analysis is considered in the framework of standard macromodeling techniques. The self-heating and mutual thermal impedances of the embedded elements of the system-preliminarily evaluated via 3-D thermal simulations-are reduced with passive identification methods, and equivalent electrical models are realized with a Foster multiport synthesis scheme. The identification is pursued with a convex optimization approach, which is found to be well suited for the thermal problem. As a case study, the coupled electrothermal analysis of an ultra-thin chip-stacking module including two thinned silicon chips interconnected by a copper line is fully carried out in SPICE.

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