Abstract

In order to evaluate the prospects of high-voltage (HV) silicon carbide (SiC) drift step recovery diode (DSRD) on pulsed power field and feasibility of outputting pulse with fast rise rate, a parallel trigger circuit is adopted and the circuit parameters affecting pulse characteristics are discussed. The simulation model of the circuit based on Sentaurus TCAD is established, in which the effects of various circuit parameters on the peak voltage and the prepulse voltage of output pulse are discussed, including the forward pumping time, the input voltage, and the inductance of reverse loop. The suitable forward pumping time and reverse loop inductance value are determined as 80 ns and 200 nH in this circuit, respectively. Experiments show that the 2.302-kV output pulse with the rise time of 1.236 ns can be obtained by HV SiC DSRD developed in our laboratory. Excluding the influence of HV probe, the actual rise time is 1.011 ns. To reduce prepulse voltage, it is effective to increase the input voltage or the inductance value of reverse loop, while the forward pumping time has little influence on it. Along with the increase of input voltage, the peak value and the rise rate of output pulse increase. Consequently, in order to improve the quality of output pulse, the input voltage should not be too low (≥200 V), while the forward pumping time and the inductance value of reverse loop should be moderate.

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