Abstract
Digital Front End Reconfiguration is considered one of the most promising techniques to implement the Software Defined Radio (SDR) and the Cognitive Radio (CR), allowing the same set of hardware to accommodate Multi-Standard Communication Systems (MSCS). The benefit increases when the reconfiguration is not only dynamic but also takes place in real time without the need to switch off the system. This work shows the advantages of using the Dynamic Partial Reconfiguration (DPR) technique in implementing the SDR convolutional encoders for 2G, 3G, LTE, and WIFI communication standards. Experimental results reveal that the DPR implementations improves the SDR implementation area and power consumption by 67% and 64% compared to the full implementation of these standards. The full implementation design and the DPR-based design are implemented and experimentally tested on Xilinx Virtex 5 design kit XUPV5-LX110T.
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