Dynamic analysis and experiment of chaotic circuit of non-homogeneous fractional memristor with bias voltage source

Abstract

A physical memristor has an asymmetric tight hysteresis loop. In order to simulate the asymmetric tight hysteresis curve of the physical memristor more conveniently, a fractional-order diode bridge memristor model with a bias voltage source is proposed in this paper, which can continuously regulate the hysteresis loop. Firstly, based on fractional calculus theory, a fractional order model of a diode bridge memristor with a bias voltage source is established, and its electrical characteristics are analyzed. Secondly, by integrating it with the Jerk chaotic circuit, a non-homogeneous fractional order memristor chaotic circuit model with a bias voltage source is established, and the influence of bias voltage on its system dynamic behavior is studied. Once again, a fractional-order equivalent circuit model is built in PSpice and validated through circuit simulation. The experimental results are basically consistent with the numerical simulation results. Finally, the experiments on the circuit are completed in LabVIEW to validate the correctness and feasibility of the theoretical analysis. The results indicate that the fractional order memristor with bias voltage source can continuously obtain asymmetric tight hysteresis loop by adjusting the voltage of the bias voltage source. As the bias power supply voltage changes, the non-homogeneous fractional order memristor chaotic system exhibits that the period doubling bifurcation turns into chaos due to the symmetry breaking.