Dual-Output Stacked Class-EE Power Amplifiers in 45nm SOI CMOS for Q-Band Applications

Abstract

Stacking multiple devices improves the output power and efficiency in mmWave power amplifiers by increasing the achievable output voltage swing. This work presents a new topology for stacked Class-E-like power amplifiers. In this technique, a Class-E load network is placed at the drain node of each stacked device, which imparts a true Class-E behavior to all the devices in the stack. The resulting topology is called the Dual (Multi) Output Stacked Class-EE PA. Two Q-band prototypes - a unit cell with 2 devices stacked, and a power-combined version employing two such unit cells - have been fabricated in IBM's 45nm SOI CMOS technology using the 56nm body-contacted devices. Measurements yield a peak PAE of 25.5% for the Dual Output Stacked Class-EE unit cell with saturated output power of 17.9 dBm, and a peak PAE >16% for the power-combined version with saturated output power >19.1 dBm. Excellent correspondence is observed between simulation and measurement as a consequence of active and passive device modeling efforts.