Dual-Inverter PWM Scheme for DC-Biased Vernier Reluctance Machines With Reduced Switching Frequency Capable of Zero-Sequence Current Regulation

Abstract

This article proposes a dual-inverter pulsewidth modulation (PWM) scheme for dc-biased vernier reluctance machines (dc-biased-VRMs) with reduced switching frequency capable of zero-sequence current regulation. The dc-biased-VRM utilizes the additional dc bias current in armature winding to construct the rotor flux. To regulate the dc bias current, two sets of three-phase inverters with common dc bus are used to provide dc current flow path. In each switching cycle, the number of switching actions is doubled compared with the conventional three-phase inverter. There is still a certain optimization space for adjusting the dc bias current and reducing the switching loss. The proposed scheme reconfigures the zero voltage vector based on the discontinuous PWM (DPWM) scheme, it effectively reduces the switching actions, thus reducing the switching frequency and ensuring the low switching loss of the inverter. In addition, an inserted zero voltage vector regulation method is associated with the proposed DPWM scheme, and it assures the zero-sequence current regulation ability. Besides, by adopting complementary zero voltage vector distribution in odd and even sectors, the balanced voltage stress of upper and lower switching devices in each bridge arm is realized. The proposed dual-inverter PWM scheme does not require any additional devices, and it provides an effective solution to improve the efficiency of the dc-biased-VRM drive system. Finally, the effectiveness of the proposed scheme is verified experimentally.