Dual Shapiro steps of a phase-slip junction in the presence of a parasitic capacitance

Abstract

Bloch oscillations in a single Josephson junction in the phase-slip regime relate current to frequency. They can be measured by applying a periodic drive to a DC-biased, small Josephson junction. Phase-locking between the periodic drive and the Bloch oscillations then gives rise to steps at constant current in the I-V curves, also known as dual Shapiro steps. Unlike conventional Shapiro steps, a measurement of these dual Shapiro steps is impeded by the presence of a parasitic capacitance. This capacitance shunts the junction resulting in a suppression of the amplitude of the Bloch oscillations. This detrimental effect of the parasitic capacitance can be remedied by an on-chip superinductance. Additionally, we introduce a large off-chip resistance to provide the necessary dissipation. We investigate the resulting system by a set of analytical and numerical methods. In particular, we obtain an explicit analytical expression for the height of dual Shapiro steps as a function of the ratio of the parasitic capacitance to the superinductance. Using this result, we provide a quantitative estimate of the dual Shapiro step height. Our calculations reveal that even in the presence of a parasitic capacitance, it should be possible to observe Bloch oscillations with realistic experimental parameters.