Dual Redundant Embedded Synchroniser for 1553 Bus Synchronisation of Launch Vehicle Checkout Applications

Abstract

Ballistic performances of solid motors are evaluated through the static test where the motor will be attached to the test fixture with full set of instrumentation systems to capture all performance parameters and the nozzle will be actuated as per predefined duty cycle. During flight, flight computer will be issuing control commands in real-time to digital control electronics which in turn control the actuators. In order to ensure reliability, dual redundant flight configuration with two flight computers, two flight buses and two digital control electronics packages is used. Checkout computer’s issue commands to the control electronics during static test have to meet the exact timing requirement. Tight synchronisation is essential between these two chains to ensure smooth switchover in case of failure. Maximum drift between 1553 messages from both checkout computers must not exceed 50 us for the entire static test duration of 220 s. In order to meet the requirement, two 1553 bus controllers are driven using external trigger generated from two FPGA-based circuits which have a master–slave configuration. Stable dual redundant synchroniser generates pulses every 20 ms which is used to trigger the bus controller to send 1553 messages. The slave follows master’s transitions if it falls within sync window. Single point failures are taken care of in the system design. Clock for master and slave is derived from temperature compensated crystal oscillator (TCXO) with 1 ppm stability. Periodic correction with in sync window is undertaken to compensate clock count error. In the human-rated launch vehicle avionics configuration, quad redundant systems are used. To enable this system to support quad bus configuration, a logical extension to the current system is made in order to implement quad redundant synchroniser system. This configuration logic is also discussed as a successor to the dual redundant system. System performance was evaluated under different test conditions and satisfactory results are obtained.