Dual‐logic‐in‐memory implementation with orthogonal polarization of van der Waals ferroelectric heterostructure

Abstract

AbstractThe rapid advancement of AI‐enabled applications has resulted in an increasing need for energy‐efficient computing hardware. Logic‐in‐memory is a promising approach for processing the data stored in memory, wherein fast and efficient computations are possible owing to the parallel execution of reconfigurable logic operations. In this study, a dual‐logic‐in‐memory device, which can simultaneously perform two logic operations in four states, is demonstrated using van der Waals ferroelectric field‐effect transistors (vdW FeFETs). The proposed dual‐logic‐in‐memory device, which also acts as a two‐bit storage device, is a single bidirectional polarization‐integrated ferroelectric field‐effect transistor (BPI‐FeFET). It is fabricated by integrating an in‐plane vdW ferroelectric semiconductor SnS and an out‐of‐plane vdW ferroelectric gate dielectric material—CuInP2S6. Four reliable resistance states with excellent endurance and retention characteristics were achieved. The two‐bit storage mechanism in a BPI‐FeFET was analyzed from two perspectives: carrier density and carrier injection controls, which originated from the out‐of‐plane polarization of the gate dielectric and in‐plane polarization of the semiconductor, respectively. Unlike conventional multilevel FeFETs, the proposed BPI‐FeFET does not require additional pre‐examination or erasing steps to switch from/to an intermediate polarization, enabling direct switching between the four memory states. To utilize the fabricated BPI‐FeFET as a dual‐logic‐in‐memory device, two logical operations were selected (XOR and AND), and their parallel execution was demonstrated. Different types of logic operations could be implemented by selecting different initial states, demonstrating various types of functions required for numerous neural network operations. The flexibility and efficiency of the proposed dual‐logic‐in‐memory device appear promising in the realization of next‐generation low‐power computing systems.image