Dual Locality-Based Flash Translation Layer for NAND Flash-Based Consumer Electronics

Abstract

NAND flash memory shows prominent performance, so it has been used as storage devices of consumer electronics, such as the smart phones and tablet personal computers. As the storage management software of NAND flash memory, the page-level flash translation layer (PLFTL) owns very high I/O access performance for consumer electronics. As an improved version of PLFTL, the demand-based PLFTL selectively keeps active mapping entries in the DRAM (Dynamic Random Access Memory) and the demand-based PLFTL mainly considers the temporal locality of workloads. However, the spatial locality also appears in many workloads. To exploit the temporal locality and spatial locality of workloads, a novel dual locality-based FTL (DL-FTL) is proposed in this paper. DL-FTL uses the sequential cache mapping state table (S-CMST) and sequential physical address cache mapping table (SPA-CMT) to process the sequential requests. To decrease the update counts of translation pages, the mapping entries that are evicted from S-CMST will be written back to NAND flash memory using a batch update strategy. The experimental results show that our proposed DL-FTL raises the cache hit ratio by up to 66.39% and reduces the system response time by up to 21.64% on average, compared with the demand-based PLFTL.