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Abstract
In this work, we report the performance of 3 µm gate length “dual barrier” InAlN/AlGaN/GaN HEMTs on Si substrates with gate–drain contact separations in the range 4–26 µm. Devices with Pt- and Ni-based gates were studied and their leakage characteristics are compared. Maximum drain current IDS of ∼1 A mm−1, maximum extrinsic transconductance gm ∼203 mS mm−1 and on-resistance Ron ∼4.07 Ω mm for gate to drain distance LGD = 4 µm were achieved. Nearly ideal sub-threshold swing of ∼65.6 mV dec−1 was obtained for LGD = 14 µm. The use of Pt-based gate metal stacks led to a two to three orders of magnitude gate leakage current decrease compared to Ni-based gates. The influence of InAlN layer thickness on the transistor transfer characteristics is also discussed.
Highlights
Wide bandgap GaN-based semiconductors continue to attract interest for high power and frequency electronics applications due to the fundamental properties of these materials including large breakdown field, high electron mobility, and saturation electron velocity in the device channel formed in the widely investigated AlGaN/ GaN heterostructure [1,2,3,4,5]
We report the performance of 3 mm gate length “dual barrier” InAlN/AlGaN/GaN HEMTs on Si substrates with gate–drain contact separations in the range 4–26 mm
If AlGaN is inserted as an interlayer, surface morphology can be improved and electron mobility can be increased in InAlN/AlGaN/AlN/GaN structures [9]
Summary
Wide bandgap GaN-based semiconductors continue to attract interest for high power and frequency electronics applications due to the fundamental properties of these materials including large breakdown field, high electron mobility, and saturation electron velocity in the device channel formed in the widely investigated AlGaN/ GaN heterostructure [1,2,3,4,5]. The novelty of the work reported here is that for the first time, these dual barrier structures have been incorporated into transistors on a silicon substrate, targeting power switching applications The importance of this development is that power switching transistors have many tens of millimeters of gate periphery and so a large diameter, low cost substrate platform is vital to satisfy the needs of generation high efficiency power electronics applications [16]. It is this requirement that motivates the study of dual barrier devices with layout capable of supporting high voltage operation on a silicon substrate. Ni is very commonly used due to its stronger adhesion to GaN [17]
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