DTA: layout design tool for CMOS analog circuit

Abstract

Layout is an important step in analog IC design. This paper presents an automation design of analog circuit layout by matching of devices and reducing noise coupling to decrease noise sensitivity. We first avoid the mismatch of constructing devices. Then, all devices are placed according to the wire length and area constraints. Finally, an effective approach is proposed to reduce noise coupling in the routing step. We have implemented our design method in several CMOS analog circuits. It can be seen that the proposed method can generate good analog circuit layout with specified timing constraints